2020

Frequency generator and associated method

Device with a high efficiency voltage multiplier

Systems and methods for shielded inductive devices

Segmentation superposition technique for binary error compensation

Compensation technique for the nonlinear behavior of digitally-controlled oscillator (DCO) gain

Radio frequency oscillator

Resonator circuit

Injection locked time mode analog to digital converter

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2019

Frequency generator and associated method

Software reconfigurable digital phase lock loop architecture

Variable step switched capacitor based digital to analog converter incorporating higher order interpolation

Transceiving device

All-digital phase locked loop using switched capacitor voltage doubler

Time-to-digital converter

Oscillator and clock generator

Device with a voltage multiplier

Frequency generator and associated method

Ultra-low power receiver

PVT-free calibration function using a doubler circuit for TDC resolution in ADPLL applications

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2018

Reconfigurable calculation unit with atomic computation units and control inputs

CMOS tuner and related tuning algorithm for a passive adaptive antenna matching network suitable for use with agile RF

Time register

Time-to-digital converter and method therefor

Charge sharing filter

Wideband digitally controlled injection-locked oscillator

Time-to-digital converter

Phase tracking receiver

Digital phase locked loop

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2017

Phase domain calculator clock, ALU, memory, register file, sequencer, latches

Transformer based impedance matching network and related power amplifier, ADPLL and transmitter based thereon

Fractional-N frequency synthesizer incorporating cyclic digital-to-time and time-to-digital circuit pair

Transformer based impedance matching network and related power amplifier, ADPLL and transmitter based thereon

RF circuit, DCO, frequency divider with three divided clock outputs

DCO phase noise with PVT-insensitive calibration circuit in ADPLL applications

Quadrature LC tank digitally controlled ring oscillator

60 GHz wideband class E/F.sub.2 power amplifier

Frequency synthesizers with adjustable delays

All digital phase-locked loop

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2016

Software reconfigurable digital phase lock loop architecture

Fractional-N all digital phase locked loop incorporating look ahead time to digital converter

Wideband FM demodulation by injection-locked division of frequency deviation

Time-to-digital converter and method therefor

Frequency synthesizers with amplitude control

Split transformer based digitally controlled oscillator and DC-coupled buffer circuit therefor

Switching current source radio frequency oscillator

Phase-locked loop (PLL)

60 GHz frequency generator incorporating third harmonic boost and extraction

Split transformer based LC-tank digitally controlled oscillator

Oscillator with favorable startup

Capacitor arrangement for oscillator

Oscillator

Phase-locked loop (PLL)

Transmitter

RF circuit with DCO, state machine, latch, modulator, timing update

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2015

Method and apparatus of estimating/calibrating TDC gain

Class-F CMOS oscillator incorporating differential passive network

Phase-locked loop circuit

High order discrete time charge rotating passive infinite impulse response filter

High resolution millimeter wave digitally controlled oscillator with reconfigurable distributed metal capacitor passive resonators

Digitally-controlled power amplifier with bandpass filtering/transient waveform control and related digitally-controlled power amplifier cell

ASIP with reconfigurable circuitry implementing atomic operations of a PLL

First and second phase detectors and phase offset adder PLL

Time-to-digital system and associated frequency synthesizer

Linearization and calibration predistortion of a digitally controlled power amplifier

Integrated circuit, communication unit and method for improved amplitude resolution of an RF-DAC

High-IF superheterodyne receiver incorporating high-Q complex band pass filter

Frequency modulator having digitally-controlled oscillator with modulation tuning and phase-locked loop tuning

Polar transmitter having frequency modulating path with interpolation in compensating feed input and related method thereof

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2014

Phase locked loop (PLL) with multi-phase time-to-digital converter (TDC)

Digital amplitude modulation

Low power all digital PLL architecture

Oscillator circuit and method for generating an oscillation

Apparatus and method for calibrating timing mismatch of edge rotator operating on multiple phases of oscillator

Polar transmitter having digital processing block used for adjusting frequency modulating signal for frequency deviation of frequency modulated clock and related method thereof

Digitally-controlled power amplifier with bandpass filtering/transient waveform control and related digitally-controlled power amplifier cell

Frequency synthesizer and associated method

Digital phase locked loop

Transmitter employing pulling mitigation mechanism and related method thereof

Integrated circuit, communication unit and method for improved amplitude resolution of an RF-DAC

Method and apparatus of estimating/calibrating TDC mismatch

Transmitter and frequency deviation reduction method thereof

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2013

Multi-stage digitally-controlled power amplifier

Phase locked loop (PLL) with multi-phase time-to-digital converter (TDC)

Frequency synthesizer and associated method

PVT-free calibration circuit for TDC resolution in ADPLL

Clock generator for generating output clock having non-harmonic relationship with input clock and related clock generating method thereof

All-digital frequency synthesis with DCO gain calculation

Simultaneous multiple signal reception and transmission using frequency multiplexing and shared processing

Clock generator for generating output clock having non-harmonic relationship with input clock and related clock generating method thereof

Predistortion calibration and built in self testing of a radio frequency power amplifier using subharmonic mixing

Digital amplitude modulation

Digital phase locked loop

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2012

Software reconfigurable digital phase lock loop architecture

Fine-grained gear-shifting of a digital phase-locked loop (PLL)

Radio frequency built-in self test for quality monitoring of local oscillator and transmitter

Bandwidth reduction mechanism for polar modulation

Linearization of a transmit amplifier

Method and apparatus for asynchronous clock retiming

Computation spreading utilizing dithering for spur reduction in a digital phase lock loop

Power amplifier with two transistors and traces forming two transformers

Transmitter PLL with bandwidth on demand

Local oscillator with non-harmonic ratio between oscillator and RF frequencies using XOR operation

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2011

Digital phase locked loop with integer channel mitigation

Interpolative all-digital phase locked loop

Binary ripple counter sampling with adjustable delays

Sampling mixer with asynchronous clock and signal domains

Parallel redundant single-electron device and method of manufacture

Removing close-in interferers through a feedback loop

All-digital frequency synthesis with DCO gain calculation

Variable delay oscillator buffer

On-chip receiver sensitivity test mechanism

Local oscillator incorporating phase command exception handling utilizing a quadrature switch

Computation spreading for spur reduction in a digital phase lock loop

Method and apparatus for digital amplitude and phase modulation

Digital phase locked loop with dithering

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2010

Power amplifier

Precise delay alignment between amplitude and phase/frequency modulation paths in a digital polar transmitter

Method of defining semiconductor fabrication process utilizing transistor inverter delay period

Computation parallelization in software reconfigurable all digital phase lock loop

All digital phase locked loop architecture for low power cellular applications

Technique for improving antialiasing and adjacent channel interference filtering using cascaded passive IIR filter stages combined with direct sampling and mixing

Transmitter for wireless applications incorporation spectral emission shaping sigma delta modulator

Digital phase locked loop with dithering

Local oscillator with non-harmonic ratio between oscillator and RF frequencies using XOR operation with jitter estimation and correction

Digital phase locked loop with gear shifting

Integrated power amplifier

Single-electron tunnel junction for complementary metal-oxide device and method of manufacturing the same

Local oscillator with non-harmonic ratio between oscillator and RF frequencies using pulse generation and selection

Apparatus and method for acquisition and tracking bank cooperation in a digitally controlled oscillator

Harmonic characterization and correction of device mismatch

Fast hopping frequency synthesizer using an all digital phased locked loop (ADPLL)

Oscillator system, method of providing a resonating signal and a communications system employing the same

Hybrid stochastic gradient based digitally controlled oscillator gain K.sub.DCO estimation

Efficient pulse amplitude modulation transmit modulation

Active removal of aliasing frequencies in a decimating structure by changing a decimation ratio in time and space

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2009

Sampling mixer with asynchronous clock and signal domains

Calibration circuitry and delay cells in rectilinear RF power amplifier

Adaptive spectral noise shaping to improve time to digital converter quantization resolution using dithering

Single-electron injection/extraction device for a resonant tank circuit and method of operation thereof

Predistortion calibration in a transceiver assembly

Hybrid polar/cartesian digital modulator

Direct radio frequency (RF) sampling with recursive filtering method

Continuous reversible gear shifting mechanism

All-digital frequency synthesis with non-linear differential term for handling frequency perturbations

Gain normalization of a digitally controlled oscillator in an all digital phase locked loop based transmitter

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2008

Active removal of aliasing frequencies in a decimating structure by changing a decimation ratio in time and space

Gain calibration of a digital controlled oscillator

Wireless communications device having type-II all-digital phase-locked loop (PLL)

Low noise high isolation transmit buffer gain control mechanism

Method and apparatus for a fully digital quadrature modulator

Modulation noise estimation mechanism

Transmit filter

Frequency tuning range extension and modulation resolution enhancement of a digitally controlled oscillator

Time-to-digital converter with non-inverting buffers, transmission gates and non-linearity corrector, SOC including such converter and method of phase detection for use in synthesizing a clock signal

Built-in self test method for a digitally controlled crystal oscillator

Technique for improving antialiasing and adjacent channel interference filtering using cascaded passive IIR filter stages combined with direct sampling and mixing

Negative contributive offset compensation in a transmit buffer utilizing inverse clocking

Type-II all-digital phase-locked loop (PLL)

Hybrid stochastic gradient based digitally controlled oscillator gain K.sub.DCO estimation

Oscillator system, method of providing a resonating signal and a communications system employing the same

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2007

Fast hopping frequency synthesizer using an all digital phased locked loop (ADPLL)

On-chip receiver sensitivity test mechanism

Removing close-in interferers through a feedback loop

Circuit for high-resolution phase detection in a digital RF processor

Gain calibration of a digital controlled oscillator

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2006

Type-II all-digital phase-locked loop (PLL)

Active removal of aliasing frequencies in a decimating structure by changing a decimation ratio in time and space

Method and architecture for controlling asymmetry of an LMS adaptation algorithm that controls FIR filter coefficients

Sigma-delta (.SIGMA..DELTA.) analog-to-digital converter (ADC) structure incorporating a direct sampling mixer

All-digital frequency synthesis with capacitive re-introduction of dithered tuning information

Efficient charge transfer using a switched capacitor resistor

Frequency synthesizer with phase restart

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2005

Multi-tap, digital-pulse-driven mixer

Efficient pulse amplitude modulation transmit modulation

Active removal of aliasing frequencies in a decimating structure by changing a decimation ratio in time and space

Digital PLL with gear shift

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2004

Hybrid of predictive and closed-loop phase-domain digital PLL architecture

Frequency synthesizer with digitally-controlled oscillator

Frequency synthesizer with digitally-controlled oscillator

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2003

Digitally-controlled L-C oscillator

High-speed digital timing and gain gradient circuit employing a parallel architecture

Method and architecture for controlling asymmetry of an LMS adaptation algorithm that controls FIR filter coefficients

System and method for time dithering a digitally-controlled oscillator tuning input

Power saving circuitry using predictive logic

Phase detector architecture for phase error estimating and zero phase restarting

Method and architecture to facilitate achieving a fast EPR4 equalization start-up in a magnetic recording read channel

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2002

Phase-shift calculation method, and system implementing it, for a finite-impulse-response (FIR) filter

Digital fractional phase detector

Frequency synthesizer

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2001

Digital phase-domain PLL frequency synthesizer

Method and apparatus for acquiring a preamble signal in a hard disk drive

Digital finite-impulse-response (FIR) filter with a modified architecture based on high order Radix-N numbering

Method and system for estimating an input data sequence based on an output data sequence and hard disk drive incorporating same

High-speed digital circuit employing a band-zero-determination-aside (B.O slashed.DA) architecture

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2000-1994

Method and apparatus for extracting band and error values from digital samples of an analog signal

Sync detect circuit

High frequency transformer apparatus

Phase detector and methodology